Zhaoxiang Ren, Dongxin Ni, Cheng-rui Zhang, Liang Zhou
Abstract
This article presents the analysis, design, and implementation of a wideband, high-efficiency, and high-harmonic-rejection (HR) octupler in 65-nm CMOS. A harmonic-recycling quadrupler generates a broadband excitation, while an injection-locked structure suppresses unwanted harmonics and controls phase relationships in the quadrupled output. A Gilbert cell further cancels odd- and even-mode components during frequency doubling, which reduces harmonic products and improves HR performance. An output-stage amplifier and balun enhance spectral purity by exploiting the intrinsic filtering and even-mode suppression. The proposed architecture is verified through even–odd mode theoretical analysis and circuit-level simulation. The design achieves an output frequency of 78–109 GHz (33.16% fractional bandwidth) with an input range of 9.75–13.625 GHz, delivering 8.01-dBm peak power with 5.75% conversion efficiency. The measured HR-ratio (HRR) exceeds 86.54 (1st), 68.17 (2nd), 83.44 (3rd), 59.32 (4th), 74.20 (5th), 58.32 (6th), 50.12 (7th), 50.98 (9th), 56.51 (10th), and 61.17 dBc (11th). The core occupies only 0.265 mm2.
Citation format
REN, Zhaoxiang, et al. A 78–109-ghz octupler using injection-locked phase-difference control and a gilbert cell with >50-dbc harmonic rejection. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2026.