Efficient parallel rotation of images on FPGA-accelerated platforms

This paper addresses the problem of misalignment in multi-source images and proposes an efficient method for its correction using rotation techniques based on geometric transformations. This phenomenon is common in applications where sensors or cameras exhibit relative motion, generating distortions that affect the quality of subsequent analysis. In systems with computing constraints, energy consumption, or real-time operation requirements, adequate compensation for these deformations becomes essential to ensure reliable processing. In this context, a hardware-friendly architecture is proposed that implements a novel memory access strategy aimed at mitigating the negative effects of pseudo-random access inherent in geometric transformation. This strategy allows for maintaining a continuous data flow in a pipeline configuration, facilitating task parallelization and improving overall system performance. To validate the proposal, an Ultra96-V2 platform was used, a low-cost MPSoC on which a hardware architecture was developed capable of executing a bare-metal application designed to process a hyperspectral image previously loaded into DDR memory and perform its rotation and alignment in real time. Additionally, the same experiment was replicated on a Jetson Nano platform to compare hardware resources, energy consumption, execution times, and transfer rate, allowing for an evaluation of the efficiency and competitiveness of the proposed system. Finally, a comparative analysis with previously published state-of-the-art solutions is included, highlighting the advantages of the presented architecture in terms of performance, efficiency, and adaptability for embedded applications focused on multi-source image processing. • A parallel image rotation architecture implemented on FPGA platforms. • Efficient hardware acceleration exploiting spatial and pipeline parallelism. • Significant reduction in processing latency compared to software solutions.