Computer ScienceEngineering
K. Hiraki, H. Amano, M. Kuga, T. Sueyoshi, T. Kudoh, H. Nakashima, H. Nakajo, H. Matsuda, T. Matsumoto, S. Mori
tlooto Summary
The basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities, can exploit high performance of coarse- grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.
Abstract
Abstract is not available.
Citation format
HIRAKI, K., et al. Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations. Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN, 1994: 427–434.