tlooto सारांश
This paper gives an introduction how to construct dynamic memory tests and test flows by choosing a pattern, voltage levels and timings, and modifications for characterization, diagnostic and speed testing are discussed.
सारांश
This paper gives an introduction how to construct dynamic memory tests and test flows. Step by step a basic march test is developed choosing a pattern, voltage levels and timings. Starting with this basic pattern, modifications for characterization, diagnostic and speed testing are discussed. These variations are then used to construct a test sequence to ensure functionality according to the data sheet specification.
साइटेशन फॉर्मेट
VOLLRATH, J. Tutorial: Synchronous dynamic memory test construction-a field approach. Records of the IEEE International Workshop on Memory Technology, Design and Testing, 2000: 59–64.