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A divide-and-conquer approach to test generation for large synchronous sequential circuits

I. Pomeranz, S. Reddy

1992.7.8[1992] Digest of Papers. FTCS-22: The Twenty-Second International Symposium on Fault-Tolerant Computing

DOI: 10.1109/ftcs.1992.243579

tlooto Summary

A method for generating tests for synchronous sequential circuits that does not use the complete circuit description is proposed, to allow true divide-and-conquer to be applied to test generation.

Abstract

Abstract is not available.

Citation format

POMERANZ, I.; REDDY, S. A divide-and-conquer approach to test generation for large synchronous sequential circuits. 1992 Digest of Papers Ftcs-22 the Twenty-Second International Symposium on Fault-Tolerant Computing, 1992: 230–237.