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Computer ScienceEngineering

DRAMSim2: A Cycle Accurate Memory System Simulator

P. Rosenfeld, E. Cooper-Balis, B. Jacob

2011IEEE Computer Architecture Letters

DOI: 10.1109/l-ca.2011.4

tlooto Summary

The process of validating DRAMSim2 timing against manufacturer Verilog models in an effort to prove the accuracy of simulation results is described.

Abstract

Abstract is not available.

Citation format

ROSENFELD, P.; COOPER-BALIS, E.; JACOB, B. Dramsim2: A cycle accurate memory system simulator. IEEE Computer Architecture Letters, 2011, 10: 16–19.