On The Geometrical Optimization Of Cmos Hall Cells, Rectangular And Square

This paper presents geometrical optimization approaches, in order to improve the performances of the Hall cells. To this purpose, the geometrical correction factor was maximized, with respect to several imposed technological parameters, such as area and contacts size. The focus of this analysis is on both square and rectangular Hall structures, with small sensing contacts. Three-dimensional physical simulations for the square Hall cells are also included in this study. To complete the overview, experimental results regarding the sensitivity and offset of a certain square Hall cell, integrated in a CMOS technological process, are offered.